Mark Sui

About

ECE, hardware, and the personal archive around it.

I’m Mark Sui, an Electrical and Computer Engineering student at the University of California, San Diego, currently pursuing a Master of Science in Electrical and Computer Engineering. I already hold Bachelor of Science degrees in Computer Engineering and Mathematics.

My work sits around hardware, software, and applied mathematics. I am especially interested in hardware, SoC performance, computer architecture, RTL design, and VLSI-related engineering roles.

Core Skills

Digital Design

RTL, FPGA, verification, and physical-design oriented work across architecture and implementation.

Verilog SystemVerilog FPGA Timing

Architecture

Computer architecture, datapath design, throughput analysis, and performance-aware hardware thinking.

ISA Pipelines CDC SRAM

AI Systems

Evaluation pipelines, regression analysis, robustness testing, and Python tooling around model behavior.

Python PyTorch Tracing QA

Math + Embedded

Applied mathematics, algorithms, and embedded system integration from sensing to board-level work.

Analysis Algorithms ESP32 PCB

Selected Highlights

Skills

Programming

Python C C++ Java JavaScript MATLAB TCL Verilog SystemVerilog

Hardware & Architecture

Computer Architecture RTL Design RTL Verification FPGA ASIC / VLSI CMOS Logic VHDL SRAM Memory Systems

Performance & Verification

Timing Closure Pipeline Balancing CDC Optimization Throughput / Latency VCD Waveforms Regression Testing

AI & Data Science

Machine Learning Deep Learning PyTorch TensorFlow NumPy Pandas Data Analysis Computer Graphics

Embedded Systems

ESP32 Arduino PCB Design I2C SPI UART Sensor Integration

Math & Algorithms

Cryptography Numerical Analysis Real Analysis Applied Mathematics Linear Algebra Probability Algorithms Data Structures Graph Algorithms

Tools

Git Linux LaTeX Jupyter Quartus ModelSim Cadence Virtuoso Innovus

Productivity & Design

Word Excel PowerPoint Access Photoshop Illustrator

Languages

Mandarin Chinese English Japanese (Basic)